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    3,930 data logger fpga project iş bulundu, ücretlendirmeleri EUR

    Merhaba, ben Levent. FPGA de Sinyal işleme işleri yaptığınızı belirtmişsiniz. Bu tip işlere ihtiyacımız olabilir. Bize şu ana kadar yaptığınız sinyal işleme / dijital uygulamalarından bahseder misiniz. Saygılarımla

    €899 / hr (Avg Bid)
    €899 / hr Ortalama Teklif
    1 teklifler

    Merhaba, bizim bir projede FPGA mühendisine ihtiyacimiz var ve sizinle bu konuda görüsmek istiyorum.

    €9 (Avg Bid)
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    Donanım Tasarımı; Atmel ve PIC Serisi Mikrodenetleyiciler, SMD Malzeme Operatörlüğü, Analog ve Sayısal Devre Tasarımı Elektronik Kart Çizimi (Şematik-PCB) - Basımı, RF modül kontrollü 8 Röle çıkışlı Donanım Tasarımı ve Yazılımının yapılması. USB, RS232, Can-bus, DC, step motor uygulamaları, Timer ve İnterrupt uygulamaları. Osilaskop, Sinyal jenera...

    €13 - €22 / hr
    €13 - €22 / hr
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    fpga ile encoderli dc motor dışarıdan girilen açı değeri kadar dönücek [URL'yi görüntülemek için giriş yapın] motor bu kullanılacak

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    FPGA Spartan 3e ile parmakizi tanımlama. Proje süresi 2 hafta.

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    iI have a IP logger website. Its given me user Public and private IP and visitor mobile device model with brand name and version but on the other hand its not give me Pc/laptop Device Exact brand name with [URL'yi görüntülemek için giriş yapın] here I need add feature Pc/laptop brand with model ***Its does not support in mobile Uc browser and Opera browser,Firefox So ...

    €90 (Avg Bid)
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    Frequencies Generator FPGA 5 gün left
    ONAYLI

    Hello, i want someone to design a device (frequency generator) that produces multiple accurate frequencies. This device will communicate with a smartphone app and a site you will develop. I need an expert in these fields, pcb design fpga programming, app mobile programming, website development and communication those 3. So the project includes 3 parts. 1. The device. 2. The mobile app. 3. The web...

    €2481 (Avg Bid)
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    I need a small CPU project prepared, to teach and demonstrate CPU construction. It should be able to fit on an Intel Altera. It should use RISC. The key components are the ability to explain why cache's were chosen, why addressing was chosen, and what options existed. 8-bits. It should be built using blocks, such that I can remove a block, and code in my own block, and assuming all is good, w...

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    PART A Create a project about a 128x3 (128 words, with 3 bits at each word) single- port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. One side of the DIP switch clears the memory address (not the memory contents). The depressing of the first push-button indicates a memory wr...

    €121 (Avg Bid)
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    SITUATION: I have a VHDL design for a custom processor + peripherals that needs to go into an FPGA. It passes functional simulation that uses VHDL testbenches. I am in the process of adding VHDL checkers. This design needs to pass timing simulation with a (soft) target frequency of 50 MHz, be programmed into an FPGA, and be verified using an off-the-shelf FPGA card. While I'm strong in digit...

    €28 / hr (Avg Bid)
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    Dear all, I would like to develop an IoT device for tracking of location, temperature, humidity and light during transportation of shipments in the freight industry by air, sea and road. Visualization of the data on a platform. Please advise if you are interested in this project. Thanks and [URL'yi görüntülemek için giriş yapın]

    €4217 (Avg Bid)
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    Narrative --------------- The µLab is the enclosure that holds the mixing system and consists of a 10cm * 10cm * 10 cm box with 1.5-2 mm thick PC/PCE/ABS walls and a total weight of less than 1 kg. A group of 8 transparent tubes (FST?) will contain liquids to be mixed (1A+1B-->1C, 2A+2B--> 2C, 3A+3B-->3C, 4A+4B-->4C). The solutions A and B will be separated in their correspon...

    €221 (Avg Bid)
    Acil
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    Seeking a developer who is proficient in designing the FPGA system(circuit & PCB, firmware) for the industrial camera. -who can achieve high-performance image preprocessing on frame grabber boards(using protocol such as Camera Link). -who have an experience to integrate real-time functions into the camera system for pixel-oriented gain control, compensation of defective pixels, increased dyna...

    €33 / hr (Avg Bid)
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    I am attaching assignments here,It has one FPGA,Two UNO and Two C++ host PC simple programs.

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    PART A Create a project about a 128x3 (128 words, with 3 bits at each word) single- port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. One side of the DIP switch clears the memory address (not the memory contents). The depressing of the first push-button indicates a memory wr...

    €45 (Avg Bid)
    €45 Ortalama Teklif
    1 teklifler

    Hi Boris B., have a IP logger website. Its given me user Public and private IP and visitor mobile device model with brand name and version but on the other hand its not give me Pc/laptop Device Exact brand name with [URL'yi görüntülemek için giriş yapın] here I need add feature Pc/laptop brand with model ***Its does not support in mobile Uc browser and Opera browser,F...

    €135 (Avg Bid)
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    1 teklifler

    I have a Arduino sketch with Motor control. I want to change this code into VHDL or Verilog HDL. This is simple project. If anyone knows Arduino and FPGA, it takes one day to do it.

    €140 (Avg Bid)
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    I need Python developer who can fixed to my Ip logger website based problem . I have a IP logger website. Its given me user Public and private IP and visitor mobile device model with brand name and version but on the other hand its not give me Pc/laptop [URL'yi görüntülemek için giriş yapın] here I need add feature Pc/laptop brand with model ***Its does not support in...

    €118 (Avg Bid)
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    I am building a maze game from the ground up, the assembler, data path etc. I need some help with the VGA controller and input. This will be an on going project but for this part I need to get the input working. I am using Quartas to write it and Im using the DE1-SoC FPGA Im going to use the PS/2 port for the input using the arrow keys to move the character. For now I would just like to get the i...

    €18 / hr (Avg Bid)
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    Create a project about a 128x3 (128 words, with 3 bits at each word) single-port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. •One side of the DIP switch clears the memory address (not the memory contents). •The depressing of the first push-button indicates a memory write...

    €49 (Avg Bid)
    €49 Ortalama Teklif
    6 teklifler

    Looking for a competent freelancer in FPGA, VHDL, Simulink and Python to do some work for me. Please read the attached document for full project specification

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    I need parse Verilog (vhdl) code for fpga, structure the same code and rewrite to another fpga. The project is ready.

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    ADC in FPGA Bitti left

    Implementation of suitable RC filter for ADC. Digital part implementation is done on FPGA. RC filter has to be designed for given specification.

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    There is a device that uses CAN with an 250k. baudrate It is necessary to read data by a specific ID and send to UART. Also receive data from UART and send by specific ID to CAN. The firmware must be added to the finished Cypress project, which also uses UART. UART 1M baudrate.

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    PI device which will monitor the vibration via accelerometer on a wind turbine. The device will have to report, via email, if the amplitude of the vibration exceeds certain limits

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    I am working on some personal project involving GPX data transformation, the idea is to take a basic GPX set that contains TimeStamp, Latitude, Longitude, Speed and elevation and loaded into a dataframe/dataset in Python, once loaded create three derived variables; as follow; Height = Elevation - 1140 Vertical Speed (in meters per second) = (current elevation - previous elevation) Phase = Cate...

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    Work includes writing an Android mobile App and build up a web hosting domain for storing registration information and receiving email. Function of the App: a) Send and store the registration information (name, email and date of registration) to the web database; b) play around 15 sound tracks in mp3 format (~300M) c) record the play information (date and time, name of the sound track and durati...

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    DVLSI project 'ASIC design of face detection using haar wavelet'. Use verilog, FPGA and Viola Jones algorithm

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    hi , I have a website that is called tracking website. I need something add. 1. Device exact name [URL'yi görüntülemek için giriş yapın] browser support 3. Secound add with time [URL'yi görüntülemek için giriş yapın] a blank box with tracking link where I write as my wish

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    logger java Bitti left

    need done in java asap 30 minute let me know will give u details after

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    SMS content logger. Identify & log content from specified number / s . The sender MSISDN ( 1-4 pcs ) is typed in settings and the app will count how many SMS:s from each MSISDN contain for example numbers 1,2,3,4, etc up to 500. The identifier can also be something else if its easier to code. Preferably the identifiers are set during the installation of the app. The end result will be a wee...

    €759 (Avg Bid)
    Gizlilik Anlaşması
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    Body Logger App Website as discussed.

    €225 (Avg Bid)
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    Design and do board layout of a small FPGA test board With the following features 1) Artix 7 (XC7A15T-1FTG256I ) FPGA 2) 5V DC input power 3) Various power supplies needed for ARTIX 7 will be generated on board using appropriate power supply modules 4) All of the IO pins of the FPGA will be made available as through hole pads on this board. 5) JTAG connector on board to download code using a Xil...

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    Design and do board layout of a small FPGA test board approximately 3" x 3" in size With the following features 1) Artix 7 (XC7A15T-1FTG256I ) FPGA 2) 5V DC input power 3) Various power supplies needed for ARTIX 7 will be generated on board using appropriate power supply modules 4) All of the IO pins of the FPGA will be made available as through hole pads on this board. 5) JTAG connecto...

    €349 (Avg Bid)
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    I am working on a product which includes some FPGA based electronics circuit, usb and wireless connectivity. Its a wearable device which must have good aesthetics as well. I need the freelancer to calculate the approximate designing cost and cost per piece if it's designed from India. They should have enough technical knowledge and industry experience. If the freelancer can help us further...

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    looking for someone who can program FPGA card BCU-1525 or popular model to mine Ethash Ethereum or other mining algorythme

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    We need urgency a Pyrometer with GPS / GSM controller. We have to monitor in real time around the clock location of the logger and the the temperature of a surface, therefore the logger must have a pyrometer. The logger has to send automatically every specific time (this time has to configured with a web site for example, every 1 min, 5 min, 10 min, or 1 hour) to our server (which will be reachabl...

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    Need an extra eyes to review my Altera design. You must has done a design with Altera Cyclone IV E. If you can show me that you have a design with Cyclone IV E, you are in. What I need from you is to review my Cyclone schematic, it should from 1 to 2 hours total. I had problem with configuration chip with my Cyclone IV E FPGA, need your help.

    €49 / hr (Avg Bid)
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    Hi, I have one FPGA Xilinx Alveo U200 card installed on a Linux system. I can't get it to work with any of the cryptocurrency mining software, as those apps don't see/recognize the card at the moment. I am 100% sure that this can work, just need to figure out how specifically or what else needs to be done here. I am not sure what I still need here, what driver or tweak is required, o...

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    I need someone to make a key logger and have it programmed to where if I move the software to my usb and stick it into another computer the keylogger would instantly install and I wouldn’t have to spend no more than 10 seconds at the computer

    €298 (Avg Bid)
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    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better. Link will be provided Please bid only if you can work with Quartus and V17.0 to be prpecise. Its needed ASAP

    €18 (Avg Bid)
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    6 teklifler

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better. Link will be provided Please bid only if you can do. Its needed ASAP

    €18 (Avg Bid)
    €18 Ortalama Teklif
    3 teklifler

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better Please bid only if you can do. Its needed ASAP

    €12 (Avg Bid)
    €12 Ortalama Teklif
    3 teklifler

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language Please bid only if you can do. Its needed ASAP

    €19 (Avg Bid)
    €19 Ortalama Teklif
    6 teklifler

    This app should measure the average "forces" from the last four seconds of one axis and send this number to a web-logger via json or HTTP request etc... For example to [URL'yi görüntülemek için giriş yapın] or so. So basically reading the values from the Z axis for four seconds with 10Hz or so. Calculate the average and send it to the web. If this number sh...

    €65 (Avg Bid)
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    There is a device that uses CAN with an 250k. baudrate It is necessary to read data by a specific ID and send to UART. Also receive data from UART and send by specific ID to CAN. The firmware must be added to the finished Cypress project, which also uses UART. UART 1M baudrate.

    €159 (Avg Bid)
    €159 Ortalama Teklif
    7 teklifler

    To detect circles by hough transformation in verilog. the board is spartan-6.

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    Implementation digital signal processing algorithm on FPGA

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    Get one normal image in Zybo Z7 with PCam 5c Camera and send it to a computer, then do another one. In another mode, process image (join several of them) and send it to the computer, then do another one. Communication by Ethernet. If it's easier on another board we can talk about it Done on Vivado or any other software... Source code required Thanks!

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