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    2,790 e1 framer vhdl iş bulundu, ücretlendirmeleri EUR

    xilinx design suite ile single cycle mips işlemcisinin datapat ve kontrol bloklarının tasarımı ve belirtilen komutların icrasını gerçekleştiren bir [login to view URL] vhdl dilinde yazılacaktır.

    €78 (Avg Bid)
    €78 Ortalama Teklif
    3 teklifler

    Implementation of Fractional order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please.

    €149 (Avg Bid)
    €149 Ortalama Teklif
    3 teklifler

    I need a simple VHDL program for measuring the time between two input signals. The VHDL program should be in structural code and should includes modules like Counter, BCDtoASCI, UART and FStateMachine + top level. I need also for every module and for the hole program testbenches.

    €155 (Avg Bid)
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    11 teklifler

    FPGA implementation of Fractional Order function using VHDL, by using descrete function and any approximation methods.

    €331 (Avg Bid)
    €331 Ortalama Teklif
    9 teklifler

    Hey, I have working project in simulation that when I try to run it on board it doesn't work. I need someone with that board or that have familiar board to notice if there is problem with my code.

    €137 (Avg Bid)
    €137 Ortalama Teklif
    3 teklifler

    This includes the development of vhdl code for PWM generator, PID controller, flux estimator etc. Training would be web based on Skype or webex.

    €159 (Avg Bid)
    €159 Ortalama Teklif
    1 teklifler

    Implementation of PID controller based FPGA using VHDL.

    €95 (Avg Bid)
    €95 Ortalama Teklif
    18 teklifler

    ...on-location Active Directory Domain Controllers one running Office 365 Connect in order to synch the on location Active Directory and Exchange with Office 365. Microsoft Office 365 E1 with Azure. We require: 1. The on-location Exchange Server to be de-commissioned and all email to be strictly from the Office 365 Exchange instance. 2. Cloud Office 365

    €792 (Avg Bid)
    €792 Ortalama Teklif
    9 teklifler

    *FAILURE TO ANSWER MY QUESTIONS BELOW WILL RESU...posting and I look forward to meeting some of you. Example Style 1. [login to view URL] 2. [login to view URL] 3. [login to view URL] Best, Grim

    €2065 (Avg Bid)
    €2065 Ortalama Teklif
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    ...operation of the selected architecture. Fig. 1 shows a binary division example to recap the binary division process. -Structural and behavioral codes for the binary divider using VHDL. -Testbench code testing as many divisions as possible. Different inputs that output different quotients and remainders should be tested too. -Synthesis of written code and

    €36 (Avg Bid)
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    12 teklifler

    I Have mips in VHDL code, I want to add to it UART

    €31 (Avg Bid)
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    5 teklifler

    I got MIPS in VHDL, but when I run it on FPGA, It seems to do nothing, although it's working in simulation.

    €33 (Avg Bid)
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    5 teklifler

    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    €59 (Avg Bid)
    €59 Ortalama Teklif
    2 teklifler

    Design a multifunction wristwatch that has time-keeping, alarm, and stopwatch functions. The wristwatch has three buttons (B1, B2, and B3) that are used to change the mode, set the time, set the alarm, start and stop the stopwatch, and so on. Pushing button B1 changes the mode from Time to Alarm to Stopwatch and back to Time. The functions of other buttons vary depending on the mode.

    €45 (Avg Bid)
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    3 teklifler

    RTL design project All of the data required to explain what I want are found in the attached file

    €102 (Avg Bid)
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    1 teklifler

    I will provide all parameters and specifications for this project. I will also provide code for finding prime number so you just need to develop mips coding files in VHDL

    €162 (Avg Bid)
    €162 Ortalama Teklif
    8 teklifler

    Hello, Server has Centos with Asterisk and Freepbx Need help, to setup pbx server and Sangoma E1 card thanks in advance! Regards, CP

    €68 (Avg Bid)
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    3 teklifler
    Dice game VHDL Bitti left

    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    €7 (Avg Bid)
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    1 teklifler
    VHDL project Bitti left

    Anyone who is good in VHDL and can help me in implementing load, move, add, xor

    €2 / hr (Avg Bid)
    €2 / hr Ortalama Teklif
    1 teklifler

    Design a circuit that emulates an alarm system, which is armed and disarmed with a code consisting of 4 symbols given by the buttons on the board (for example btnC, btnL, btnR, btnU). The alarm is armed or disarmed when the correct code combination is entered. When the alarm is disarmed, LED0 is on, when the alarm is armed, LED15 is on. SW0 is a sensor, when the alarm is armed and SW0 = 1, the LED...

    €29 (Avg Bid)
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    18 teklifler
    VHDL project Bitti left

    I need a vhdl project that integrates IoT and communications.

    €188 (Avg Bid)
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    3 teklifler

    Design an electronic dice game (Craps in the United States). The game involves two dice, each of which can have a value between 1 and [login to view URL] counters are used to simulate the roll of the dice. Each counter counts in the sequence 1, 2, 3, 4, 5, 6, 1, 2,… Thus, after the “roll” of the dice, the sum of the values in the two counters will be in the range 2 through [logi...

    €58 (Avg Bid)
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    8 teklifler

    I need single cycle 32 bit mips vhdl coding to find prime numbers. I will provide code to find prime number so you just have to build cpu for this specific purpose and I am also going to provide parameters for this architecture. I am gonna share project file after finalising with best person to do this job

    €136 (Avg Bid)
    €136 Ortalama Teklif
    4 teklifler

    We need a Verilog/VHDL developer to write some simple blocks for the Virtex-7 FPGA. The development environment is Xilinx Vivado. There are 5 blocks in total with the following functionalities: 1. CM Memory: Write a wrapper for the Xilinx xpm_memory to fit our bus requirements and testbench. 2. RDM Memory: Write a wrapper for the Xilinx

    €441 (Avg Bid)
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    12 teklifler

    I'm a electronic engineer and I have a good command on computer programs and also on digital programming like VHDL.

    €19 / hr (Avg Bid)
    €19 / hr Ortalama Teklif
    1 teklifler

    You have to write code and report for this .

    €14 (Avg Bid)
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    15 teklifler

    I have the scheme of the project need only to work with the basys 3. Only to use buttons and switches from the basys3. Need the whole code in VHDL for Vivado.

    €19 (Avg Bid)
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    7 teklifler

    Develop a 32‐bit single or multi‐cycle CPU capable of performing a search for prime numbers.    CPU

    €119 (Avg Bid)
    €119 Ortalama Teklif
    4 teklifler

    Hello, Need to setup Asterisk server, with Sangoma PCI Card for asterisk voip server Carrier Siptrunk TDM with Audio Codec E1-PRI Best regards, CP

    €173 (Avg Bid)
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    17 teklifler

    Has to be completed by the end of tomorrow (13/05/2019) Create VHDL code for chess clock, uploaded the task as a file.

    €109 (Avg Bid)
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    3 teklifler

    freelancer required for small project. must know FPGA programming/VHDL/Verilog

    €22 (Avg Bid)
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    4 teklifler

    Some work related to fpga and vhdl. Need any expert who can manage that

    €19 (Avg Bid)
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    I have 2 schemes. One with neuron and with genetic algorithm. I need to combine both to train this neuron via genetic algo. Using VHDL in ISE design suite 14.7. Here is [login to view URL] picture of two symbols that I want to combine(gen - genetic algorithm with build in neuron process, neur4sigm - neuron with sigmoid func). I need to train this neuron with

    €132 (Avg Bid)
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    I curr...frontal face a1) capture image b) tell user to look left c) detect that left side view c1) capture image d) tell user to turn back to center e) detect the frontal face again e1) capture image f) take the three images into an array If this goes Ok, I would them like to do another job for Objective-C iPhone Android Version 3 Days $100 thanks

    €163 (Avg Bid)
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    12 teklifler

    Want to be able to use accelerometer data on microblaze softcore processor, need SPI driver and interface on VHDL

    €196 (Avg Bid)
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    2 teklifler

    Tôi cần xúc tiến thương mại cho sàn CLoan - Sàn kết nối người đi vay và cho va...ly/2Veu2pj Những người hoàn thành khảo sát và để lại thông tin cá nhân sẽ được nhận phần quà trị giá 10$ tại Cloan khi đăng kí tài khoản Fanpage [login to view URL]

    €19 (Avg Bid)
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    Hi, We have to make a report & VHDL coding with simulation. Please bid who are expert from an electrical engineering background. After that, we would discuss more details. Please give your best quote & we would make long term relationship with the perfect electrical engineering freelancer. Thanks.

    €140 (Avg Bid)
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    7 teklifler

    Hello, I'm currently working on a project that I am struggling with due to lack of VHDL experience. Want to create an SPI driver and interface it with a Microblaze softcore processor and the on-board accelerometer (ADXL362) so that the processor can read the accelerometer data.

    €229 (Avg Bid)
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    14 teklifler

    I need you to develop some VHDL software for me. Message for further details

    €137 (Avg Bid)
    €137 Ortalama Teklif
    15 teklifler
    VHDL project Bitti left

    I need you to develop some VHDL software for me. Contact me for more details

    €187 (Avg Bid)
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    6 teklifler
    VHDL tasks Bitti left

    I have some simple VHDL tasks. My deadline is tomorrow. 1. Suggest a structural and behavioral description of a bidirectional cyclic shift register. 2. Suggest a structural and behavioral description of a bidirectional arithmetic shift register. Use parallel generation operators and configuration options. 3. Create a subroutine that performs the conversion

    €23 (Avg Bid)
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    4 teklifler

    Implementation of FOPID controller based FPGA using VHDL.

    €98 (Avg Bid)
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    6 teklifler

    VHDL and FPGA system details via PM

    €14 (Avg Bid)
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    7 teklifler

    VHDL and FPGA system using vivado program.

    €582 (Avg Bid)
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    7 teklifler
    VHDL software Bitti left

    I need you to develop some VHDL software for me. Must have good VHDL background. Message me for more details. Thank You.

    €39 (Avg Bid)
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    5 teklifler
    Vhdl programer Bitti left

    I need a vhdl task done along with report

    €27 (Avg Bid)
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    Looking for a Vivado Studio Specialist to evaluate code. On a Zturn board ( Xilinx Soc 7000 Series.) Skills required: AXI RTL Vhdl Vivado Studio

    €110 (Avg Bid)
    €110 Ortalama Teklif
    2 teklifler

    You have to complete coding and report writing

    €59 (Avg Bid)
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    5 teklifler

    I need a block to select some outputs based on the input and previous values of the input in VHDL

    €27 (Avg Bid)
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    6 teklifler

    Produ...(tens of thousands to hundreds of thousands) FPGA based consumer product using A3P series FPGA from Microsemi. Product must be easy-intermediate difficulty to design Verilog/VHDL and final manufacturing cost in $30-$50 [login to view URL] as little other electronic components as possible. There is a possibility of design collaboration for winning entry.

    €98 (Avg Bid)
    Garantili
    €98
    8 girdi