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    5,135 verilog ascii iş bulundu, ücretlendirmeleri EUR

    Develop a TCP sequential server (listening to the port specified as the first parameter of the command line, as a decimal integer) that, after having established a TCP connection with a client, accepts file transfer requests from the client and sends the requested files back to the client, following the protocol specified below. The files available for being sent by the server are the ones accessi...

    €130 (Avg Bid)
    €130 Ortalama Teklif
    18 teklifler

    need help with quartus and Verilog and DE2board.

    €148 (Avg Bid)
    €148 Ortalama Teklif
    5 teklifler

    Game by verilog HDL to implement it on FPGAs Seven segments display random decimal numbers and gamer using switches to write that number as a binary.

    €32 (Avg Bid)
    €32 Ortalama Teklif
    3 teklifler

    We want a DDR3 controller for a 7 series FPGA with the following specification: - DDR3 Speed: 533MHz (DDR3-1066) - DDR3 component: MT41K1G8SN-125:A - FPGA: XC7K160T-2FFG676I The controller shall have the following interfaces to the top level: - AXI slave for incoming write data - 32bits width - AXI master for outgoing read data - 32bits width - write enable signal which enables the AXI slave inte...

    €735 (Avg Bid)
    €735 Ortalama Teklif
    6 teklifler

    AS discussed projects on Verilog_programing --using, Verisim we have new work in verilog programing, Reply soon if you can do, for these two we have INR 5500/ for you [URL'yi görüntülemek için giriş yapın] [URL'yi görüntülemek için giriş yapın]

    €2 / hr (Avg Bid)
    €2 / hr Ortalama Teklif
    1 teklifler

    The top page image of http: // [URL'yi görüntülemek için giriş yapın] is not displayed. See attached ( [URL'yi görüntülemek için giriş yapın]) I use godaddy's shared server. Images were displayed when uploading via FTP in another domain. When uploading to [URL'yi görüntülemek için giriş yapın] via FTP, the ima...

    €44 (Avg Bid)
    €44 Ortalama Teklif
    20 teklifler

    I am looking to build a software application that runs on Ubuntu Server. The application will need to communicate with a cloud to get temporary licensing daily. No pay, no license, no workee. The application will need to run as a service with minimal permissions ( we are interested in how this is going to get done. If there are options or different paths we want to understand that) . We need the ...

    €417 (Avg Bid)
    €417 Ortalama Teklif
    13 teklifler

    I am looking to build a software application that runs on Ubuntu Server. The application will need to communicate with a cloud to get temporary licensing daily. No pay, no license, no workee. The application will need to run as a service with minimal permissions ( we are interested in how this is going to get done. If there are options or different paths we want to understand that) . We need the ...

    €1111 (Avg Bid)
    €1111 Ortalama Teklif
    23 teklifler

    Convert data from flat ascii delimited files (txt format) to graphs and charts using Visual C++, I would like this software to be developed for Windows.

    €31 / hr (Avg Bid)
    €31 / hr Ortalama Teklif
    27 teklifler

    Gui development Convert data from flat ascii delimited files (txt format) to graphs and charts, I need you to develop some software for me. I would like this software to be developed for Windows.

    €20 / hr (Avg Bid)
    €20 / hr Ortalama Teklif
    16 teklifler

    We have existing hardware based on Xilinx XC7K160T-2FFG676 and TI DAC5682ZIRGC25 We want a verilog interface that accepts 32bit axi stream and is capable of speeds in excess of 400Msps. If needed, the internal interface can be 64bit axi stream on half the sample rate, but the external data rate to the DAC must be 400MSps or higher. A 2nd module must contain the SPI interface for the DAC. A sta...

    €874 (Avg Bid)
    €874 Ortalama Teklif
    6 teklifler

    Hi, This should be a quick and easy modification job. ALREADY DONE: I have a simple Django website (developed in Pycharm & Django) that reads a csv into the server db (Django has a built in default sql db) and displays the content in boxes. (see [URL'yi görüntülemek için giriş yapın]) - Then after 3 seconds (internal timer) moves row to row and updates the boxes...

    €16 (Avg Bid)
    €16 Ortalama Teklif
    3 teklifler

    I want to do image processing for some of my images its basically a red color segmentation from the image and detect the patterns using verilog..... the image size is 240x240

    €269 (Avg Bid)
    €269 Ortalama Teklif
    12 teklifler

    I have the hash algorithm that already implemented in c++ and opencl. I want to convert these hash code into VHDL or verilog.

    €27 - €227
    €27 - €227
    0 teklifler

    I need to develop a tool to convert EBCDIC format to ASCII. Freelancer with hands on experience in Mainframe and COBOL should easily able to do what is required..

    €117 (Avg Bid)
    €117 Ortalama Teklif
    7 teklifler

    The project goal is the implementation of a Verilog module to interface a high-speed ADC (250MSps) using DDR. The IO/delay shall be dynamically adjusted after reset thru a test pattern match using a test mode of the ADC. As part of the project a simulation test bench needs to be set-up to verify proper function of the interface.

    €1164 (Avg Bid)
    €1164 Ortalama Teklif
    15 teklifler

    Hi olegkaravaev84, I noticed your profile and would like to offer you my SystemVerilog/Verilog FP{GA project. We can discuss any details over chat.

    €409 / hr (Avg Bid)
    €409 / hr Ortalama Teklif
    1 teklifler

    an expert on FPGA and Verilog should bid only...

    €138 (Avg Bid)
    €138 Ortalama Teklif
    12 teklifler
    Verilog Design Bitti left

    I have one architecture, needs the RTL verilog code for the design to be made and followed by placement and routing to derive the power.

    €116 (Avg Bid)
    €116 Ortalama Teklif
    9 teklifler

    I can send you samples of the data and if you can convert them from the ASCII to a more readable format, you can have the job. Pays very well!

    €368 (Avg Bid)
    €368 Ortalama Teklif
    8 teklifler
    build mac unit Bitti left

    build mac unit using verilog language. I have already done the multypler part and I need help to build the rest

    €29 (Avg Bid)
    €29 Ortalama Teklif
    8 teklifler

    Basically I would like to have the verilog coding to build on my basys3 hardware. required to control the LED with left and right pushbutton within a range, to code different frequency for the LED within that range, to code one letter on each 7segment and the speed of the letter being displayed is depend on the frequency coded to the led. to code a both left and right pushbutton to have the featur...

    €23 (Avg Bid)
    €23 Ortalama Teklif
    4 teklifler

    FPGA mining hardware - Xiling FPGA - Nexys Video - Can be leveraged from open source bitcoin miner code. - Based on Verilog. - Provide source code, constraints and full recipe for synthesis, implementation and bitstream generation - Connectivity via JTAG to the host (via USB). May consider UART instead, but as a less desirable solution. Mining software: bfgminer, cgminer or similar - Based on stra...

    €508 (Avg Bid)
    €508 Ortalama Teklif
    7 teklifler

    need a c# program to convert ascii text files to excel files with headings, an excel template will be provided

    €113 (Avg Bid)
    €113 Ortalama Teklif
    26 teklifler
    FPGA verilog Bitti left

    Using ModelSim or Quartus II for solving some problems i am working on

    €25 (Avg Bid)
    €25 Ortalama Teklif
    15 teklifler

    Simple but a little tedious. Type 1 page of old scanned computer code listing (PDF) into a text (TXT) format ASCII document accurately.

    €18 (Avg Bid)
    €18 Ortalama Teklif
    39 teklifler
    G code Sender Bitti left

    Firmware that operates a 3 axis CNC machine from an Arduino Uno is available and is called "grbl". There are a number of apps available to send G code via USB to the Arduino Uno that commands the CNC machine movement, etc. Some of them are browser based, some are Java, some written in Python, and another in Visual Basic. There are is also a 6 axis version of "grbl" available f...

    €774 (Avg Bid)
    €774 Ortalama Teklif
    15 teklifler

    Code will contain encryption and decryption of elliptic curve cryptography

    €101 (Avg Bid)
    €101 Ortalama Teklif
    1 teklifler

    Hi, we have project for creating simple RISC processor through vhdl/Verilog. If interested will give more information

    €9 / hr (Avg Bid)
    €9 / hr Ortalama Teklif
    1 teklifler

    VHDL/Verilog basic RISC Processor, will give more details if interested

    €6 / hr (Avg Bid)
    €6 / hr Ortalama Teklif
    1 teklifler

    This project consists to port some c code (around 50 lines) to Verilog in order to run on a FPGA. Output of the contest Verilog .v source file equivalent of verilog.c testbench .v file equivalent to doSimulation() You can run the C code with "gcc main.c && ./ [URL'yi görüntülemek için giriş yapın]" Elements to select the winning bidder: - Partial scr...

    €50 (Avg Bid)
    €50 Ortalama Teklif
    7 teklifler

    To reproduce the problem, I attached 2 files: ====== My objetive is extract data of the file [URL'yi görüntülemek için giriş yapın] with xpath of PHP ====== - [URL'yi görüntülemek için giriş yapın] (no touch, no edit, it is IMPORTANT) - [URL'yi görüntülemek için giriş yapın] (you can work here) <?php $html =...

    €24 (Avg Bid)
    €24 Ortalama Teklif
    3 teklifler

    -Tools:Altera Quartus,Modelsim and FPGA. -This Project is divided to two parts:- [URL'yi görüntülemek için giriş yapın] and implement a 32 bit architecture pipelined CPU with a single bus for a MIPS computer. Found in figure 1 is a top level view of a single core single bus MIPS CPU. Use Quartus to design the list of components found below in Verilog HDL. 1- Register F...

    €287 (Avg Bid)
    €287 Ortalama Teklif
    6 teklifler

    Hi, I'm looking for a C# programmer who can make an application interface which connects COM interface of datavendor Taipan with Tradestation 2000i, which also connects through COM. Datavendor Taipan allows asynchronous loading via COM. Furthermore, I can supply the Globalserver SDK of Tradestation 2000i, which supports COM as well. I have two options in mind and would like to hear which ...

    €208 (Avg Bid)
    €208 Ortalama Teklif
    2 teklifler

    matrix multiplication using strassenalg and karatsuba alg and carry select adder

    €39 (Avg Bid)
    €39 Ortalama Teklif
    6 teklifler

    This job is ONLY for experienced FPGA - Verilog Programmers. Apply now if you have developed bitstreams for complex applications using Xilinx or Altera FPGAs. We will match your pay with your current income OR more than that (depends on qualification) + Bonus when you deliver expected results + Opportunity to work from home + Chance to work on exciting and growing Blockchain Technology + No cont...

    €12 / hr (Avg Bid)
    €12 / hr Ortalama Teklif
    10 teklifler

    Hi, I have written (in Verilog) an SDRAM controller (for a Micron SDRAM) which works perfectly. And I have its model (downloaded from Micron's website). I need someone who can write a testbench to verify my controller (using Micron's model). I just need a basic (but good) verification using Modelsim and Verilog.

    €94 (Avg Bid)
    €94 Ortalama Teklif
    4 teklifler

    need to use Quratz 18.1 to create and simulate a 5 bit counter.

    €60 (Avg Bid)
    €60 Ortalama Teklif
    6 teklifler

    I am a Verilog beginner. Need help in instantiating a LUT based memory. The requirements are stated in the [URL'yi görüntülemek için giriş yapın] file.

    €27 (Avg Bid)
    €27 Ortalama Teklif
    8 teklifler

    Please read all the details first. and I will create 45% milestone before we start and when its done this task 100% I will create other 60% milestone and released both. I always paid the coder. check my review. ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer...

    €677 (Avg Bid)
    €677 Ortalama Teklif
    1 teklifler

    Please read all the details first. and I will create 45% milestone before we start and when its done this task 100% I will create other 60% milestone and released both. I always paid the coder. check my review. ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer...

    €169 - €508
    €169 - €508
    0 teklifler

    I have a code in Python that does the following NLP processes (using NLTK library): - Strips numbers, punctuation, non ASCII letters, etc. - Removes stop words and other given words - Runs PorterStemmer I need this converted into a C# script

    €193 (Avg Bid)
    €193 Ortalama Teklif
    11 teklifler

    Please read all the details first. and I will create 45% milestone before we start and when its done this task 100% I will create other 60% milestone and released both. I always paid the coder. check my review. ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer...

    €507 (Avg Bid)
    €507 Ortalama Teklif
    1 teklifler

    Hi, I have written an SDRAM controller (for a Micron SDRAM) which does not work very well. In the other hand, I have its model (downloaded from Micron's website). I need someone who can write a testbench to verify my controller using Micron's model and fix my controller.

    €273 (Avg Bid)
    €273 Ortalama Teklif
    10 teklifler
    Vivado Expert Bitti left

    Hello, I am looking for Vivado expert. Only bid experts in C/Python/Verilog Hope don't waste time. Thanks

    €25 / hr (Avg Bid)
    €25 / hr Ortalama Teklif
    9 teklifler

    Hi I am looking for RTL SV code for a parameterized mux which takes in input size and select line size accordingly both for one-hot coded and priority coded and it should be synthesizable.

    €104 (Avg Bid)
    €104 Ortalama Teklif
    3 teklifler

    1. Greet the user 2. Get a letter from an input file ( [URL'yi görüntülemek için giriş yapın]) and print it onto the screen 3. Find the numerical ASCII value and print it on the screen 4. Change the letter to lowercase 5. Find the numerical ASCII value and print it on the screen 6. Change the letter to upper case 7. Find the numerical ASCII value and print it on the scre...

    €18 (Avg Bid)
    €18 Ortalama Teklif
    7 teklifler