I want to get a simple 3 layer (Input-Hidden-Output) layer neural network implemented on an FPGA. The network I wish to implement is a wide network with hidden neurons ~1000-2000. I want this to be implemented for highest data throughput with optimized resource utilization. Also want to software to be written for the implemented hardware.
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Having more than 7 years of experience in verilog/system verilog design and verification. Already worked on DBN(Deep belief network) design FPGA. I can do this without any issues.