I need help regading an academic vhdl project. more infos after contacting me
17 freelancers are bidding on average $198 for this job
Hi, I am a post graduate engineer in VHDL and having very good experience in product design and codding. I will provide you best project to you.
Hello! I have experience with describing electro-mechanical systems using mixed signal simulators that can run code written in VHDL-AMS. Looking forward to hear about you. Botond
I am Master And Asst prof in Electronics Departmentreputed University from India,I have 15 year exp in this filed. i handled Lot of student projects and guided them.i am strong in digital system VHDL verilog.
Hi, You can call me Fed (Fedemar). Im an Electronics Engineer with 4 years of experience in Digital Design for both ASIC and FPGA using both verilog and VHDL. Im new here at [url removed, login to view] but Ive got some experie Daha fazlası