Hi, I have put together a project for Zynq Zedboard and am not very experienced with FPGA/Vivado. My problem currently is I have many warning on synthesis and removal of some registers so I need some help with issues I am having. The custom IP is a frequency counter with an AXI4 Full bus to the PS as well as an AXI Lite from the PS for configuration. I'm hoping to get to the stage of reading and writing from the PS for now
Bu iş için 6 freelancer ortalamada $15/saat teklif veriyor
Hello Employer When I was Electrical engineering student I always did projects like this. I have approx one year example for fpgas. If you choose me you'll never regret.