IC layout project for 9-12 months on contract basis
People bidding should be experienced in backend, layout, Cadence Virtuoso, memory compilers
Description : Memory Compiler Engineer to help develop and validate high
performance CMOS SRAM embedded memory compilers.
Will develop compiler modules for CMOS SRAM memories, including physical
tiling, netlist generation, timing analysis and front end model generation.
Should be experienced with circuit design, IC layout, unix scripts, and CAD
verification. Should have at least 2 years experience in memory or IC
design, preferably memory, and at least a Diploma/BS in engineering.
Interested bidders should send their resume along with the bid.
world wide web dot designlabsindia dot com
Bu iş için 9 freelancer ortalamada $6936 teklif veriyor
hey, i have been working on mentor graphics and cadence since august 2009. see the pm for further details.
Hi.. I am a graduate student in elctronics and communications engineering, and have been working on cadence for one and a half years. I have good understanding of circuit design concepts. I have keen interest in lay Daha Fazla
Please see my profile. You may contact for further details regarding my competencies.
I can make this for you. I am working like an Automation engineer with experiences in microcontroller programming and layout design.