simple verilog parser using python pyparsing

Kapalı İlan edilme: 6 yıl önce Teslim sırasında ödenir
Kapalı Teslim sırasında ödenir

looking for someone who can write a code to parse below code(using pyparsing) immediately :

module module-name(input a, input b, input c, output r);

wire mid1;

mid1=a&(~b)

wire mid2=b|c;

wire mid3=a|c,mid4=b&c;

wire mid5,mid6;

mid5=a|(~c);

mid6=a&b;

r=mid5|mid6

endmodule

*we have 4 ways to define wire as shown in above example

*each (input, output, module, wire) name must only contain (a-z0-9_)

*a wire in a module cannot describe more than one time

*if output wire doesn't described in module or a input wire didn't use in module then we must show that as a warning

*error and warnings must save in a [url removed, login to view] file like below text:

ERROR:file_name:Line_number-error_name:error_text

WARNING:file_name:line_number-Warning_name:warning_text

in above form line number must be the first point where we meet a error

after this if we get each input, output, Boolean operator, branches as a node and each wire as a vector we must show graph of code such as below in our [url removed, login to view] too:

NODE_(node_id):node_function

VECTOR_(vector_id):vector_name-source_node_id:destination_node_id

please see examples file for more information(and be aware in [url removed, login to view] file we must include ------syntax results----- and ... as shown in examples) and feel free to ask any question

Programlama Python Sanal Asistan

Proje NO: #16004292

Proje hakkında

3 teklif Uzak proje Aktif 6 yıl önce

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krishan725

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BeyoutiF00L

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GreatAssist

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