Kapalı

Write a code in Verilog for a CNN that is able to detect digits from MNIST databse

I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, relevant LED on the FPGA board should light up. For eg if the digit identified is a 2, then 2nd LED on the board should light up.

Beceriler: Python, Verilog / VHDL, FPGA, Machine Learning (ML), Algoritma

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İşveren Hakkında:
( 1 değerlendirme ) Leicester, United Kingdom

Proje NO: #30125618

Bu iş için 10 freelancer ortalamada £217 teklif veriyor

nemanjadevelope2

Hi. Hope you are doing well. I have read your project details and I am very interested in your project. As you can see on my profile, I have rich experience with Python and ML part. Please send me message and let's dis Daha Fazla

£250 GBP in 7 gün içinde
(11 Değerlendirme)
5.2
Digiexpert90

Hello Hiring Manager, I read your job descriptions carefully, I am very interesting in your job of Write a code in Verilog for a CNN that is able to detect digits from MNIST databse I have the enough experience and goo Daha Fazla

£250 GBP in 15 gün içinde
(3 Değerlendirme)
5.2
albabahmadkhan

Hi! I'm 5 years experienced Data Scientist with theoretical and practical experience in Data Science, Machine Learning & Deep Learning ready to do your work in an efficient way with strong analytical and logical reason Daha Fazla

£150 GBP in 2 gün içinde
(15 Değerlendirme)
4.8
Devrits

Hi Hiring manager I am Data Scientist, Deep Learning, Machine Learning, Flask, Docker expert In my practice I developed for clients: * AI chat bot, algorithmic trading strategy * AI rating systems, analytics dash boa Daha Fazla

£250 GBP in 4 gün içinde
(8 Değerlendirme)
4.6
(4 Değerlendirme)
4.2
IslamAdam998

Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, Design Compiler, IC Compiler and othe Daha Fazla

£250 GBP in 15 gün içinde
(16 Değerlendirme)
4.0
alamineee

Hi, Dear Employer, I have read your job post carefully. I have over seven-plus years of experience at ✔python, ✔Algorithm✔java, and others. Please feel free, and you may award me the task, I'd be happy and can present Daha Fazla

£100 GBP in 2 gün içinde
(4 Değerlendirme)
3.7
(5 Değerlendirme)
3.4
manishkj116

Hey, Hope you are doing well. I am able to write a verilog HDL code for a CNN that can be implemented on FPGA board. I will give you verilog code and generated bitstream from Xilinx Vivado 2016.2 IDE Tool. Please have Daha Fazla

£200 GBP in 7 gün içinde
(7 Değerlendirme)
3.5
arashkm73

Have done the same project before. It was a MNIST handwriting detection on FPGA and Verilog. I am interested in doing this for you. Except I don't accept the python part and the input for the hardware should be clarifi Daha Fazla

£330 GBP in 7 gün içinde
(0 Değerlendirme)
0.0