I need help in writing the vhdl code. Contact me for more details
22 freelancers are bidding on average $183 for this job
I want to help you! Please send me a message to talk about your project! I can lower my bid if I evaluate your project! Have a nice day! Hello! I can help you right away! Please look at my profile! I have 8 ye Daha Fazla
I am Hardware Design Engineer have done MSC system on Chip, University Southampton, UK. I have more than 8 years experience in digital design and well acquainted with ISE, NCverilog, Vivado 2013.4, EDK embedded tools Daha Fazla
with 2 years experiencing on FPGA/VLSI implementation using VHDL/Verilog, please send me the message to discuss your requirements and I will help you.
Hi, I am an VLSI ASIC Engineer that has lots of RTL IP cores mostly designed in Verilog, some of the project I have done in VHDL. I am working at a project right now, if you provide me more info about the project you Daha Fazla
Hi, My Background: Manager, Designs. VHDL Expert. I've already tested and implemented the Physical layer of WiMAX 802.16D OFDM Communication system in Altera 3C16 FPGA using VHDL. Please look at my profile for my Daha Fazla
Hello Sir, I have 4 years experience in HDL (VHDL/verilog), working on the design flow, FPGAs, ASICs, My last project was in the implementation of gyroscope sensor. you could chekc my profile for more details. The Daha Fazla
Hi, I would be happy to help you, I have been programming in VHDL for many years especially with Xilinx. Message me so we can talk about the details cheers
My qualification is M.Tech. in VLSI and Embedded System. I have completed project on text message entry system and equalizer using VHDL. My final thesis project on verilog, title with HDL Implementation of associative Daha Fazla
I have 3+ year exp in VLSI Design Center in Central Electronics Engineering Research Institute, India
Hello, I would like to help you with your project once you provide some more details. I have 2 years + industry experience in VHDL/Verilog along with academic projects and my thesis. Hope to hear from you Thanks Daha Fazla
I am an Electrical Student from IIT Bombay,India. I have designed and implemented processors in FPGA. Have designed SDR downconverters in FPGA for PC. I use VHDL not [url removed, login to view] can contact me anytime about the project Daha Fazla
I have very strong experience in VHDL. Please fell free to contact me for further details. Gabriel Bagur FPGA specialist.
good knowledge about VHDL/verilog least bid deliver it at a very short time it is relates to my educational field
I, Keyur Mahant working in One of the leading University of India as Asst. Professor in Electronics and Communication Engg. And Space Technology Center as Project Scientist in which, I am working on “Single Event Upset Daha Fazla
Hi! I'm an embedded systems engineer with experience in circuit design with VHDL and Verilog languages. I would like to start taking jobs in these languages here in freelancer.com. Helping you is a good start! Daha Fazla
Hi, me Jak. I would like to get into your problem as well as resolve any issue related to the code. Waiting for your response. Money is not a matter of fact. It would be my pleasure to help you.