Simplifying a truth table and implementing using gates using Quartus
$45 USD
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Simplifying a truth table and implementing using gates using Quartus, will provide more details in chat.
Proje NO: #23956419
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Hi I have been working on verilog/VHDL and Xilinx and Altera FPGAs and Tools by more than 7 years. Please let me know your requirements. I can work on your project. Thanks
Bu iş için 7 freelancer ortalamada $45 teklif veriyor
Dear sir I have more than 10 years experience in embedded systems design, please check my profile, also please message me so that we can discuss Best regards
As a Digital Electronics engineer and a Teaching Assistant, I master VHDL/Verilog very well (+5 years exp). Digital design is my current career. I will give you the task finished efficiently and quickly as well. Exampl Daha Fazla
i can do that in $25, i can make verilog/vhdl code for that, i don't have quartus, so i can make verilog/vhdl code only, you use that code in any software or tools, i have 2+ year experience as design and verification, Daha Fazla
Please advise on the details on project as on the information you provided it is impossible to estimate cost and time needed.
Hi! I’m Carlos and I have wide knowledge about programming FPGA and SoCs. Could you tell me more about the offer? Thank you