VHDL code with test bench setup (Convolution Problem)
₹1500-12500 INR
Teslim sırasında ödenir
Two 16-bit number from X0 and X9 and H0 to H9 multiply them and add them . Code shall be done in VHDL
Y= x0h0+x1h1+x2h2+x3h3+........x9h9.
For more details find the attached Set of Question.
Proje NO: #32231085
Proje hakkında
Bu iş için 4 freelancer ortalamada ₹8500 teklif veriyor
hello, I'm an electronics engineer and I have worked before with VHDL and FPGAs, I've worked on similar problems before too (solving mathematical problems), I would love to hear from you to discuss further in chat, ho Daha Fazla
Hello, I have taken a look at the project description and it seems to be a job for a FPGA engineer like me. I will provide you with a job simple but effective, where all specs are met. I am an Electronics and Telecom Daha Fazla
I am having 2.8 years of experience in fpga design and i am good at VHDL coding . I am having good knowledge in using xilinx ip cores
