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$15 USD / Hour
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India (5:41 AM)
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Joined on November 27, 2008
$15 USD / Hour
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Hi, This is Gautam Sharma, I have 6+ years of experience in doing FPGA/CPLD Coding Verfying designs using Modelsim/Questasim simmulation tools. I am Also skilled with ADC dynamic and static characterization using MATLAB and LABVIEW. I Am looking forward for projects which gives me opportunity to implement more complex and sophisticated designs.
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Experience
Project Engineer
Nov, 2007 - May, 2014
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6 years, 6 months
ISRO
Nov, 2007 - May, 2014
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6 years, 6 months
Hi, I am responsible for all coding for FPGA/CPLDs, ADC cheracterization. MATLAB based simulation/scripting. wide scale of experience with complex high-speed FPGA RTL development and its verification using Modelsim/Questasim.
Nov, 2007 - May, 2014
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6 years, 6 months
Education
Saurashtra University
2004 - 2007
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3 years
Bechlor of engineering in Electronics & Comm.

India
2004 - 2007
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3 years
Saurashtra University
2001 - 2004
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3 years
Diploma in Electronics & Comm

India
2001 - 2004
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3 years
Qualifications
Six Sigma Green Belt Certification
2011
Honeywell Automation India Ltd
This Certificate is Conferred After Completion Of Six days Classroom training on Six Sigma Principles and Lean Management.
2011
Publications
Implementation of 8-bitMCU
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This is 8-bit MCU core design analysis report on design approach and Implementation .
Verifications