verilog expert needed asap

I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.

Hi, I am a professional electrical engineer I know all about digital circuit and verilog code design on cadence mentor and synopsys and have all the required cad tools on my laptop I can finish your task quickly and efficiently, you can see my works in circuit design in my portfolio.

Hi, Please initiate a chat so that we can discuss the project details and I can provide an accurate estimate.

I have done my bachelor project on Virtex-5 LX50T implementing RLS filter for brain imaging. Furthermore, I implemented Ethernet transceiver, serial transceiver, HDMI interface and ADC on FPGA. Thats why i am best candidate for this project. Moreover currently working on fixed and floating point arithmetic cores on FPGA.

A proposal has not yet been provided

A proposal has not yet been provided

I have designed 32-bit pipeline processor using verilog. This was designed on xilinx 8.2i and hardwar was spartan 6 FPGA kit.

Currently I'm working on a FPGA project for Xilinx UltraScale device. Have some spare time to spend (3-4 hours /day) Relevant Skills and Experience I'm senior RTL designer, former employee of Renesas & Marvell. Expert on Verilog design, FPGA prototype with Xilinx + HighTechGlobal board. worked on many taped out chips, cutting egde 16nm

I have good experience in Verilog coding. I have developed many digital filters with or without pipelining.

Work with you or not to achieve the best work and cheap. Relevant Skills and Experience I already did a same project in university. The proposal was to do a pipelin struct of FIR filter calculation. And it was easy. I am an electrical engineer from FEUP.

Hi, I currently working as verilog programmer. I have done many project before. Now i'm looking opportunity to working as freelancer. I f you have any question you can contact my personal number by phone/WA : 08562261661

I have designed a VLIW processor on FPGA and I had to go through alot of pipelining.... thought it was 5 stage pipelined processor but there were too many signals... So I am the right person Relevant Skills and Experience VLIW PIPELINED PROCESSOR DESIGN

Iam having extent of knowledge in software programming like VHDL,Verilog and matlab . since iam working as Assistant professor, iam Expertise in problem solving skills araised by the students. this is my first freelancing project bid . thank you.